Recycling of integrated chips has become a major concern with increasing numbers of recycled chips entering the supply chain. Chip recycling involves scavenging and reusing the aged but functionally correct integrated circuits (ICs) in new systems. Although the devices using recycled chips might operate correctly, the operating speed and energy-efficiency will be degraded due to the prior usage. Conventional techniques exploit the temporal degradation of circuit performance to isolate the recycled ICs. Isolating recycled ICs from the genuine ones is a challenging task for arbitrarily small amounts of usage (e.g., from a few seconds to a few months). In general, conventional techniques are ineffective in detecting such fine grained usage intervals.
The drawings illustrate only example embodiments and are therefore not to be considered limiting of the scope described herein, as other equally effective embodiments are within the scope and spirit of this disclosure. The elements and features shown in the drawings are not necessarily drawn to scale, emphasis instead being placed upon clearly illustrating the principles of the embodiments. Additionally, certain dimensions may be exaggerated to help visually convey certain principles. In the drawings, similar reference numerals between figures designate like or corresponding, but not necessarily the same, elements.